/*=======================================================================*/ /*IMLIG,1998.01.07,adder4.sfl, 4-bit full-adder example */ /*=======================================================================*/ /*-----------------------------------------------------------------------*/ /*interface declaration of 1-bit full-adder (submodule) */ /*-----------------------------------------------------------------------*/ declare adder1 { input a, b, cin; /*data terminals*/ output s, cout; instrin add; /*control terminal*/ instr_arg add(a,b,cin); /*argument binding of add behavior*/ }/*adder1*/ /*-----------------------------------------------------------------------*/ /*module definition of 4-bit full-adder (top module) */ /*-----------------------------------------------------------------------*/ module adder4 { input A<4>, B<4>, CIN; output S<4>, COUT; instrin ADD; adder1 ADDER0, ADDER1, ADDER2, ADDER3; /*module instantiation*/ sel CARRY1, CARRY2, CARRY3; /*internal signal*/ instruct ADD par{ /*definition of ADD behavior*/ S= ADDER3.add(A<3>,B<3>,CARRY3).s /*S<3> ||= concatenation*/ || ADDER2.add(A<2>,B<2>,CARRY2).s /*S<2>*/ || ADDER1.add(A<1>,B<1>,CARRY1).s /*S<1>*/ || ADDER0.add(A<0>,B<0>,CIN).s; /*S<0>*/ COUT= ADDER3.cout; CARRY3= ADDER2.cout; CARRY2= ADDER1.cout; CARRY1= ADDER0.cout; }/*ADD*/ }/*adder4*/ /*-----------------------------------------------------------------------*/ /*module definition of 1-bit full-adder */ /*-----------------------------------------------------------------------*/ /* truth table of one bit full-adder ** input | output ** ---------------- ** a b cin | s cout ** 0 0 0 | 0 0 ** 0 0 1 | 1 0 ** 0 1 0 | 1 0 ** 0 1 1 | 0 1 ** 1 0 0 | 1 0 ** 1 0 1 | 0 1 ** 1 1 0 | 0 1 ** 1 1 1 | 1 1 */ module adder1 { input a, b, cin; output s, cout; instrin add; instruct add par{ /*definition of add behavior*/ s= a @ b @ cin; /* @= xor*/ cout= (^a & b & cin) /* ^= not, &= and*/ |( a & ^b & cin) /* |= or*/ |( a & b & ^cin) |( a & b & cin); }/*add*/ }/*adder1*/