/* %i "memmod.h" */
/*  $RCSfile:$ */
/*  $Author:$ */
/*  $Date:$ */
/*  $Revision:$ */
/*  $State:$ */

%i "memmod.h" 

module access {
  sel adr<16>, data_in<16>, data_out<16>, 
      instruction_in<16>, instruction_out<16>;

  instrself read_data, write_data, read_instruction, write_instruction;
  memmod m;

  instr_arg read_data(adr);
  instr_arg write_data(adr, data_out);
  instr_arg read_instruction(adr);
  instr_arg write_instruction(adr, instruction_out);


  instruct read_data par {
    data_in  = m.do15( 0b0, adr, 0b0 ).o15 || m.do14( 0b0, adr, 0b0 ).o14
            || m.do13( 0b0, adr, 0b0 ).o13 || m.do12( 0b0, adr, 0b0 ).o12 
            || m.do11( 0b0, adr, 0b0 ).o11 || m.do10( 0b0, adr, 0b0 ).o10 
            || m.do9( 0b0, adr, 0b0 ).o9   || m.do8 ( 0b0, adr, 0b0 ).o8 
            || m.do7( 0b0, adr, 0b0 ).o7   || m.do6 ( 0b0, adr, 0b0 ).o6 
            || m.do5( 0b0, adr, 0b0 ).o5   || m.do4 ( 0b0, adr, 0b0 ).o4 
            || m.do3( 0b0, adr, 0b0 ).o3   || m.do2 ( 0b0, adr, 0b0 ).o2 
            || m.do1( 0b0, adr, 0b0 ).o1   || m.do0 ( 0b0, adr, 0b0 ).o0 ;
  } 

  instruct write_data par {
    m.do0 ( 0b1, adr, data_out<0> );
    m.do1 ( 0b1, adr, data_out<1> );
    m.do2 ( 0b1, adr, data_out<2> );
    m.do3 ( 0b1, adr, data_out<3> );
    m.do4 ( 0b1, adr, data_out<4> );
    m.do5 ( 0b1, adr, data_out<5> );
    m.do6 ( 0b1, adr, data_out<6> );
    m.do7 ( 0b1, adr, data_out<7> );
    m.do8 ( 0b1, adr, data_out<8> );
    m.do9 ( 0b1, adr, data_out<9> );
    m.do10( 0b1, adr, data_out<10>);
    m.do11( 0b1, adr, data_out<11>);
    m.do12( 0b1, adr, data_out<12>);
    m.do13( 0b1, adr, data_out<13>);
    m.do14( 0b1, adr, data_out<14>);
    m.do15( 0b1, adr, data_out<15>);
  }

  instruct read_instruction par {
    instruction_in  = 
               m.do31( 0b0, adr, 0b0 ).o31 || m.do30( 0b0, adr, 0b0 ).o30 
            || m.do29( 0b0, adr, 0b0 ).o29 || m.do28( 0b0, adr, 0b0 ).o28 
            || m.do27( 0b0, adr, 0b0 ).o27 || m.do26( 0b0, adr, 0b0 ).o26 
            || m.do25( 0b0, adr, 0b0 ).o25 || m.do24( 0b0, adr, 0b0 ).o24 
            || m.do23( 0b0, adr, 0b0 ).o23 || m.do22( 0b0, adr, 0b0 ).o22 
            || m.do21( 0b0, adr, 0b0 ).o21 || m.do20( 0b0, adr, 0b0 ).o20 
            || m.do19( 0b0, adr, 0b0 ).o19 || m.do18( 0b0, adr, 0b0 ).o18 
            || m.do17( 0b0, adr, 0b0 ).o17 || m.do16( 0b0, adr, 0b0 ).o16 ;
  } 
  instruct write_instruction par {
    m.do16( 0b1, adr, instruction_out<0> );
    m.do17( 0b1, adr, instruction_out<1> );
    m.do18( 0b1, adr, instruction_out<2> );
    m.do19( 0b1, adr, instruction_out<3> );
    m.do20( 0b1, adr, instruction_out<4> );
    m.do21( 0b1, adr, instruction_out<5> );
    m.do22( 0b1, adr, instruction_out<6> );
    m.do23( 0b1, adr, instruction_out<7> );
    m.do24( 0b1, adr, instruction_out<8> );
    m.do25( 0b1, adr, instruction_out<9> );
    m.do26( 0b1, adr, instruction_out<10>);
    m.do27( 0b1, adr, instruction_out<11>);
    m.do28( 0b1, adr, instruction_out<12>);
    m.do29( 0b1, adr, instruction_out<13>);
    m.do30( 0b1, adr, instruction_out<14>);
    m.do31( 0b1, adr, instruction_out<15>);
  }

}